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Fast Fourier Transform (FFT) IP

NSS communications has different class of FFT cores with various optimizations suitable to several classes of applications. The specifications of the offered FFT cores are given below.

FFT type DIF
No of FFT points 1K / 2K / 4K /8K configurable at compile time
Input format m-bit fixed point (configurable bit size)
Output format n-bit fixed point (m=n in truncation mode)
Output order bit reversal format
Target platform FPGA & ASIC

The FFT cores are available in two architectural variations, which are explained below.

Fully parallel and pipelined architecture

This architecture uses dedicated logic for each butterfly and adds pipeline at every stage to achieve maximum throughput. The core will be capable of performing FFT operations for every clock cycle with controlled overlapping of the input samples. There are optional buffers at the input which can perform serial-to-parallel and parallel-to-serial respectively. By enabling these blocks the core can be made to work in streaming mode.


Spectrum sensing and surveillance
Software defined radios
High bandwidth spread spectrum communications

Serial architecture

The serial architecture uses reduced logic and reduced memory at the expense of higher computation time.


Biomedical signal analysis
Audio and video signal processing
Multimedia compression techniques

NSS can provide FFT core suitable to the customer needs. Please send your requirement to ip@nsscomm.com.


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